← Logic-path delay
What podcasts say about Logic-path delay
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What experts have said about Logic-path delay
1 statement · 1 positive
Reducing logic-path delay is a major chip-optimization objective.
“a major point of sort of optimization on any chip then is to sort of make this delay, delay from here as short as possible”
Open the episode · Reiner Pope – Chip design from the bottom upListen at 41:51
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